Career

From Alkhameripedia, the free encyclopedia

This article covers the career of Yaseen Alkhameri. For independent projects, see Yaseen Alkhameri (Projects).

Employment

SoC Development Engineer Co-op

September – December 2026 · Current position

Developing SystemVerilog RTL and performing UVM-based verification for an SSD controller ASIC.

Product Development Engineering Intern

June 2026 - September 2026

On Solidigm's data-center SSD Systems Integration team, Yaseen developed Python tooling to reconcile firmware-release evidence across more than 600 tracked issues, flagging ambiguous cases for engineering review. He also built analysis tools to identify obsolete and redundant firmware configuration rules across product variants, and extended internal release-tracking workflows. His work supported engineers coordinating dependencies across SoC, firmware, hardware, NAND, and validation.

Solidigm

Firmware Engineering Intern

June 2025 - May 2026

At AIVision Food in Davis, Yaseen contributed C firmware to an IoT environmental monitoring system using Zephyr RTOS, Nordic nRF52, and ESP32 platforms. He implemented event-driven Bluetooth Low Energy communication, optimized memory-constrained data paths, and used the Nordic PPK2, profiling current to identify leakage and validate reduced standby power. He also assisted with hardware bring-up, debugging, and validation of embedded platforms.

AIVision Food SmartProbe — AIVision Food

Papers

Working papers and academic project reports coauthored by Yaseen Alkhameri. These works are shared for reading and are not peer-reviewed journal or conference publications.

Working papers and unpublished project reports
Year	Paper	Status	Links
2026	Featured paper MOESI-D: A Persistent Sole-Writer Cache-Coherence State for Commutative No-Return Atomics Manav Sharma; Yaseen Alkhameri Implements and evaluates a Delegated (D) cache-coherence state in gem5 for commutative, no-return atomic updates. The simulation study compares controller-side delegation with conventional atomics, flat combining, and privatization, examining cache-line migration, execution time, and interconnect traffic. Builds on the earlier SpMV and graph coherence study.	Working paper	PDF Code
2026	Featured paper Cache Coherence Protocols on Sparse-Matrix Vector Multiplication (SpMV) and Graphs in GEM5 Kevin Le; Kilho Chang; Vivian Ly Nguyen; Yaseen Alkhameri Compares MI, MESI, and MOESI directory-based cache-coherence protocols in gem5 Ruby using sparse matrix–vector multiplication and breadth-first search across 2, 4, and 8 cores. The study examines ownership requests, invalidation-related activity, and cache-to-cache forwarding under irregular memory access. In this report, the ‘Delegated’ state is a conceptual proposal, not an implemented or validated protocol; the later MOESI-D working paper explores its implementation.	Unpublished	PDF
2026	Real-Time Object Detection on FPGA using Matched Filtering Yaseen Alkhameri; Ricardo Gonzales; Justin Hsu; Max Madrigal; Isidro Pulido Documents a streaming object detector on the DE1-SoC FPGA, combining D8M camera input, Gaussian smoothing, Sobel edge extraction, sparse matched filtering, and VGA visualization. The report covers hardware tradeoffs, module-level verification, and on-board evaluation, reporting 59.5 FPS. Yaseen contributed to the final matched-filter score tree, Sobel-based edge detection, and thresholding logic.	Unpublished	PDF Code

Employment

SoC Development Engineer Co-op

September – December 2026 · Current position

Developing SystemVerilog RTL and performing UVM-based verification for an SSD controller ASIC.

Product Development Engineering Intern

June 2026 - September 2026

Solidigm

Firmware Engineering Intern

June 2025 - May 2026

Papers

Working papers and academic project reports coauthored by Yaseen Alkhameri. These works are shared for reading and are not peer-reviewed journal or conference publications.

2026

MOESI-D: A Persistent Sole-Writer Cache-Coherence State for Commutative No-Return Atomics

Manav Sharma; Yaseen Alkhameri

Implements and evaluates a Delegated (D) cache-coherence state in gem5 for commutative, no-return atomic updates. The simulation study compares controller-side delegation with conventional atomics, flat combining, and privatization, examining cache-line migration, execution time, and interconnect traffic. Builds on the earlier SpMV and graph coherence study.

Working paper

PDF Code

2026

Cache Coherence Protocols on Sparse-Matrix Vector Multiplication (SpMV) and Graphs in GEM5

Kevin Le; Kilho Chang; Vivian Ly Nguyen; Yaseen Alkhameri

Compares MI, MESI, and MOESI directory-based cache-coherence protocols in gem5 Ruby using sparse matrix–vector multiplication and breadth-first search across 2, 4, and 8 cores. The study examines ownership requests, invalidation-related activity, and cache-to-cache forwarding under irregular memory access. In this report, the ‘Delegated’ state is a conceptual proposal, not an implemented or validated protocol; the later MOESI-D working paper explores its implementation.

Unpublished

PDF

2026

Real-Time Object Detection on FPGA using Matched Filtering

Yaseen Alkhameri; Ricardo Gonzales; Justin Hsu; Max Madrigal; Isidro Pulido

Documents a streaming object detector on the DE1-SoC FPGA, combining D8M camera input, Gaussian smoothing, Sobel edge extraction, sparse matched filtering, and VGA visualization. The report covers hardware tradeoffs, module-level verification, and on-board evaluation, reporting 59.5 FPS. Yaseen contributed to the final matched-filter score tree, Sobel-based edge detection, and thresholding logic.

Unpublished

PDF Code