Yaseen Alkhameri

Yaseen Alkhameri is a computer engineering student at UC Davis focused on RTL design, embedded firmware, and digital verification. His work spans FPGA prototyping, synthesizable Verilog, bare-metal C, and RISC-V systems. He is a SoC Development Engineer Co-op at Solidigm, developing SystemVerilog RTL and performing UVM-based verification for an SSD controller ASIC. His previous experience includes embedded firmware at AIVision Food and SSD systems integration at Solidigm, where he developed tooling for firmware-release analysis and configuration management. His projects include a real-time FPGA matched-filter object detector, a synthesizable RISC-V CPU, and a preemptive RISC-V microkernel. He also coauthored the MOESI-D working paper on delegated atomic updates in gem5, building on an earlier cache-coherence study of sparse-matrix and graph workloads.

Outside of coursework and hardware projects, he is president of the Mechanical Keyboards Club at UC Davis. He also keeps a vinyl record collection, experiments with custom keyboard firmware and layouts, and tracks his Pokemon card collection.